Method of increasing package reliability by designing in plane C

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material

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Details

438669, 438674, 438694, 427209, 427210, H01L 2120

Patent

active

061272507

ABSTRACT:
A method of manufacturing a multi-layered structure includes forming first and second layers, patterning the first layer, determining a distribution of material in at least one area of the first layer, and altering the material content of one of the first and second layers in at least one of the first layer area and a corresponding area of the second layer to approximately match the material content of the first layer and second layers.

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