Programmable neural logic device

Details Programmable neural logic device Programmable neural logic device

1991-09-12

1993-06-08

Westin, Edward P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307201, 395 24, 395 25, H03K 19173, H03K 1908

Patent

active

052182452

ABSTRACT:
A programmable logic cell, compatible with LSSD (Level Sensitive Scan Design) technique, is described whose internal logic function can be initially loaded from an EPROM or external processor. The output or contents of one cell can be connected to another cell to alter the logic operation of the second cell even while this second cell is in operation. The cells can be connected together to form a neural network.

REFERENCES:
patent: 4612459 (1986-09-01), Pollachek
patent: 4950917 (1990-08-01), Holler et al.
patent: 4994982 (1991-02-01), Duranton et al.
patent: 4999687 (1991-03-01), Luryi et al.
patent: 5019736 (1991-05-01), Furtek
patent: 5093900 (1992-03-01), Graf
"Emerging Circuit Technologies, A Reconfigurable CMOS Neural Network", by Graf, IEEE International Solid-State Circuits Conference, Feb. 1990, p. 144.

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