IC package with electric conductor lines in dielectric package b

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

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257700, H01L 2314

Patent

active

052182304

ABSTRACT:
An IC package comprising a dielectric package body for encapsulating the semiconductor chip (31) and including a bottom member (1), first and second dielectric annular members (3, 7) surrounding the semiconductor chip, and a cap member (10). A first portion of the upper surface of the first dielectric annular member (3) is covered by the second dielectric annular member and a second portion of the upper surface of the first dielectric annular member (3) is exposed, whereby a strip line (Za) is formed by the second conductor film (8), the electric conductor lines (5 and 6), and a first covered portion of the first conductor film (4), and a microstrip line (Zb) is formed by the electric conductor lines (5 and 6), and a second exposed portion of the first conductor film (4). A third conductor film (9a and 9b) to be grounded is provided in the first dielectric annular member (3) in correspondence with second exposed portion of the first dielectric annular member ( 3), which is closer to the conductor lines (5 and 6) than the first conductor film (4) and constituting, with the conductor lines, a further microstrip line (Zb).

REFERENCES:
patent: 4881116 (1989-11-01), Hidada et al.
patent: 4890155 (1989-12-01), Miyagawa et al.
patent: 4922324 (1990-05-01), Sudo et al.

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