Row addressing apparatus for a bistable display device

Facsimile and static presentation processing – Facsimile – Recording apparatus

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358 24D, 3151691, 340771, 340776, 340793, 340805, H04N 566, H04N 312, H05B 3700, G09F 900

Patent

active

041830628

ABSTRACT:
A horizontal sync signal simultaneously addresses a second counter and a first memory addressing circuit comprising a frequency multiplier connected to a first counter. The output of the first counter addresses the first memory. A comparator compares the outputs from the first memory and the second counter, and generates an output which may be compensated if necessary to subsequently assure proper sequencing of the display device. The comparator output addresses a second memory. Outputs from the second memory and the second counter are combined in an adder and the summation thereof are fed into a subtractor along with the output of the first memory. The output of the subtractor is fed into a binary-to-decimal converter which in turn feeds a row electrode driver circuit.

REFERENCES:
patent: 3906290 (1975-09-01), Kurahashi et al.
patent: 3953672 (1976-04-01), Ninke
patent: 3961134 (1976-06-01), Jarvis
patent: 3997719 (1976-12-01), Judice
patent: 4123751 (1978-10-01), Gladstone et al.
AC Plasma Panel TV Display with 64 Discrete Intensity Levels; Anderson and Fowler article Digest: 1974 S.I.D. Informational Symposium, San Diego, May 1974, furnished by applicant.

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