Computer memory system with integrated parallel shift circuits

Static information storage and retrieval – Addressing

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365238, 364521, G11C 1300

Patent

active

046445030

ABSTRACT:
The system includes a plurality of memory units each for storing a plurality of independently addressable binary bits. The units operate together in response to each common bit address to supply a bit from each unit to form an array of bits for a discrete section of a larger array. The units are interconnected through common interconnection buses and selectively actuable input and output gate connections to those buses to provide for selective shifting of bits between units to change the bit array.

REFERENCES:
patent: 3893088 (1975-07-01), Bell
patent: 3976982 (1976-08-01), Eiselen
patent: 4150364 (1979-04-01), Baltzer
patent: 4168488 (1979-09-01), Evans
patent: 4225929 (1980-09-01), Ikeda
patent: 4249172 (1981-02-01), Watkins et al.
patent: 4550437 (1985-10-01), Kobayashi et al.
Robert F. Sproull et al, "The 8.times.8 Display", Dec. 1981, p. 10--Section 2.5. The Shifter--Carnegie-Mellon University.
Andreas Bechtolsheim & Forest Baskett, "High Performance Raster Graphics for Microcomputer Systems", Computer Systems Laboratory, Stamford University--pp. 43-47 of Computer Graphics, vol. 14, No. 3, Jul. 1980.

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