Method for fabricating a deep submicron mosfet device using an i

Fishing – trapping – and vermin destroying

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437 29, 437 41SW, 437229, H01L 218234

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056704011

ABSTRACT:
A process for fabricating a deep submicron MOSFET device has been developed, featuring a local threshold voltage adjust region in a semiconductor substrate, with the threshold voltage adjust region self aligned to an overlying polysilicon gate structure. The process consists of forming a narrow hole opening in a dielectric layer, followed by an ion implantation procedure used to place the threshold voltage adjust region in the specific area of the semiconductor substrate, underlying the narrow hole opening. A polysilicon deposition, followed by a chemical mechanical polishing procedure, results in the creation of a narrow polysilicon gate structure, in the narrow hole opening, self aligned to the threshold voltage adjust region.

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