Process for manufacturing insulated-gate semiconductor devices w

Details Process for manufacturing insulated-gate semiconductor devices w Process for manufacturing insulated-gate semiconductor devices w

1983-06-09

1984-08-21

Ozaki, G.

Metal working

Method of mechanical manufacture

Assembling or joining

29576B, 29578, 29579, 29580, 148187, H01L 21223, H01L 21265

Patent

active

044661762

ABSTRACT:
Process for manufacturing insulated-gate semiconductor devices such as MOSFETs being with a semiconductor wafer (such as silicon) including a drain region, a gate insulating layer initially formed uniformly on the surface of the drain region, and a polysilicon conductive gate layer. A two-stage polysilicon etch procedure is disclosed. The initial etch produces relatively narrow channels with substantially vertical sidewalls. Unetched portions of the polysilicon layer are used as masks during a first P type diffusion to form a shorting extension of the device base region and during the forming of a silicon nitride mask layer by a highly directional process, such as ion implantation, which avoids the formation of any nitride layer on the channel sidewalls. In a subsequent lateral etch step, previously unetched portions of the polysilicon gate electrode layer are etched to define insulated polysilicon gate electrode structures. These structures extend upwardly from and are spaced along the principal surface, and are also spaced from the silicon nitride masks. Then, the silicon nitride masks are each used as a combination diffusion and selective oxidation mask to form MOSFET source and base regions and to oxidize the polysilicon gate electrode sidewalls. The silicon nitride mask is removed, and appropriate electrode metallization applied.

REFERENCES:
patent: 3595716 (1971-07-01), Kerr et al.
patent: 4084986 (1978-04-01), Aoki et al.
patent: 4148054 (1979-04-01), Hart et al.
patent: 4345265 (1982-08-01), Blanchard
Leipold et al., "A FET-Controlled Thyristor in SIPMOS Technology", Technical Digest of International Electron Devices Meeting, Washington, D.C., Dec. 8, 1980, Institute of Electrical and Electronics Engineers, Piscataway, N.J., pp. 79-82.

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