Image processing apparatus

Details Image processing apparatus Image processing apparatus

1991-11-27

1995-02-21

Hayes, Gail O.

Boots, shoes, and leggings

36441313, 36441323, 382 54, 382 56, 382 41, 348618, 348619, 348620, G06F 1542

Patent

active

053922115

ABSTRACT:
A frame image signal which is output cyclically is converted to a digital signal and input to a first multiplier in a digital filter. The first multiplier multiplies a digital image signal Y.sub.i of each frame by (1-a), and supplies the product (1-a).multidot.Y.sub.i to a first input terminal of an adder. The coefficient a is a negative coefficient whose absolute value is not more than 1, so that (1-a) becomes a positive coefficient of not less than 1. An output of the adder serves as an output Y.sub.i ' of the digital filter from which the residual image has been erased, and is supplied to a subsequent unit, e.g., a display unit (not shown) connected to the output of the adder. The output Y.sub.i ' of the adder is also supplied to a frame memory and is delayed by one frame period. Therefore, an output Y.sub.i-1 ' of the frame memory is a one-frame preceding image output. The signal Y.sub.i-1 ' is input to a second multiplier and is multiplied by the coefficient a. The product is input to a second input terminal of the adder.

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patent: 5029586 (1991-07-01), Honda
patent: 5090038 (1992-02-01), Asahina

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