Efficient utilization of present state/next state registers

Pulse or digital communications – Receivers – Particular pulse demodulator or detector

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371 43, 341 51, H04L 2706

Patent

active

055598374

ABSTRACT:
In accordance with the present invention, a technique for efficiently utilizing memory in determining which next state accumulated cost to retain, such as in a communication system or a Viterbi decoder. The system includes a memory having a portion of registers allocated to a first array and a portion of registers allocated to a second array. The technique includes retrieving a present state accumulated cost from a storage register of the first array and calculating a next state accumulated cost based on the present state accumulated cost. The next state accumulated cost is stored in a storage register of the second array. The second array is designated as containing present state accumulated costs. A present state accumulated cost is retrieved from a storage register of the second array and used in calculating a subsequent next state accumulated cost. The subsequent next state accumulated cost is stored in a storage register of the first array.

REFERENCES:
patent: 4583078 (1986-04-01), Shenoy et al.
patent: 5272706 (1993-12-01), Park
patent: 5291524 (1994-03-01), Itakura et al.

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