Flash memory having select transistors

Static information storage and retrieval – Floating gate – Particular connection

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36518533, 257315, G11C 1134

Patent

active

055597351

ABSTRACT:
A plurality of stack type transistors each formed by successively stacking a tunnel oxide, a floating gate, an ONO stacked insulating film and a control gate on one another are provided on a silicon semiconductor substrate. A select transistor is provided adjacent to each of the stack type transistors. A flash memory cell is made up of two transistors: the stack type transistor and the select transistor. Owing to the present construction, a flash memory cell can be achieved which is operable at a low voltage, excellent in rewrite endurance, rewritable on a one-pulse basis and free from verification and overerasing cares. Accordingly, a high-reliable flash memory can be realized.

REFERENCES:
Itoh et al., "A New Nand Cell for Ultra High Density 5V--only EEPROMS", May 10, 1988.
Johnson et al., "A 16 kb Electrically Erasable Nonvolatile Memory", IEEE ISSCC Dig. Tech. Pap., pp. 152-153, 271, 1980.

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