Pulse storing and retrieval circuit

Registers – Platform operated – Platform actuated traffic counters

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G06M 1100

Patent

active

039731081

ABSTRACT:
A pulse storing and retrieval circuit for storing and recovering serially received pulses to be processed includes a delay line having a plurality of output locations along the length of the line. A first pulse is coupled to the delay line for propagation therethrough and is coupled from the delay line to a pulse processor for processing. Logic circuitry in the pulse storing and retrieval circuit responds to a first signal indicating detection of the pulse by the processor and an indication that processing of the pulse by the pulse processor is in progress to cause the sequential coupling in a first direction of the delay line output locations to the processor as the trailing edge of the pulse propagates down the delay line. Upon indication from the processor that it has finished its processing and a succeeding pulse can be accepted, the logic circuitry begins sequentially coupling each of the output locations of the delay line to the processor in a second direction opposite to the first direction until the leading edge of a succeeding pulse is reached. Upon detection of the succeeding pulse by the pulse processor, the logic circuitry again begins the cycle.

REFERENCES:
patent: 3328772 (1967-02-01), Oeters
patent: 3398403 (1968-08-01), Ostendorf, Jr.
patent: 3733547 (1973-05-01), Coulter et al.
patent: 3783247 (1974-01-01), Klein et al.

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