Thin soldered semiconductor package

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

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Details

257773, 257779, 257666, 257676, H01L 2348, H01L 2313, H01L 2944

Patent

active

055593720

ABSTRACT:
A semiconductor package directly soldering the chip pad to the inner leads and a method for producing the package are disclosed. The chip pad is placed on the bottom surface of an inner lead extending from opposed sides of the chip pad. A plurality of inner lead holes are formed in the interconnection parts between the inner leads and the auxiliary leads. A solder resist film bonded to the lead frame has a plurality of solder resist holes communicating with the inner lead holes. In order to produce the package, a lead pattern is formed and the lead frame is etched using the lead pattern, so that the inner lead holes and the solder resist holes are formed and the inner leads come into direct contact with the chip pad. Thereafter, the chip pad is soldered to the inner leads.

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patent: 4336551 (1982-06-01), Fujita et al.
patent: 4626478 (1986-12-01), van Dyk Soerewyn
patent: 4811081 (1989-03-01), Lyden
patent: 5021866 (1991-06-01), Sudo et al.
patent: 5123163 (1992-06-01), Ishikawa et al.
patent: 5132772 (1992-07-01), Fetty
patent: 5388577 (1995-02-01), Hubbard
patent: 5467864 (1995-04-01), Kim

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