Circuit for implementing a low accumulated disparity code in hig

Details Circuit for implementing a low accumulated disparity code in hig Circuit for implementing a low accumulated disparity code in hig

1986-11-05

1988-03-15

Griffin, Robert L.

Pulse or digital communications

Repeaters

Testing

340347DD, H04L 2534

Patent

active

047317973

ABSTRACT:
First and second parallel-connected calculating units (12, 18) simultaneously calculate the sum .SIGMA..sub.n =.SIGMA..sub.n-1 +Sn and the difference .SIGMA.'.sub.n =.SIGMA..sub.n-1 -Sn where the Sn is equal to one-half of the difference between the number of 1-bits and the number of 0-bits in a binary word to be transmitted and: ##EQU1## A comparator circuit (22) compares the signs of .SIGMA..sub.n-1 and Sn and the result of the comparison is used to reset the output from one of said calculating units to zero. The sum unit (12, 18) is reset to zero when the signs are different and the difference unit (13, 19) when the signs are equal, in which case the bits of the transmitted word are inverted. The sign comparison bit is also transmitted as an additional bit of the transmitted word.

REFERENCES:
patent: 4027335 (1977-05-01), Miller
patent: 4499454 (1985-02-01), Shimada
patent: 4620311 (1986-10-01), Schouhamer
patent: 4626826 (1986-12-01), Fukuda et al.
Frequenz, vol. 34, No. 2, Feb. 1980, pp. 45-52, Berlin, DE.
Electronics Letters, vol. 5, No. 4, Feb. 20, 1969, pp. 79-81.
Free International Conference on Communications, Conference Record, vol. 2, Jun. 19-22, 1983, Boston, U.S., pp. 690-694.
Second International Conference on Telecommunication Transmission--Into the Digital Era, Mar. 17-20, 1981, London, GB, pp. 213-216.
The Bell System Technical Journal, vol. 53, No. 6, Jul.-Aug. 1974, pp. 1103-1126, American Telephone and Telegraph Company, U.S.

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