Boots – shoes – and leggings
Patent
1985-11-19
1989-12-19
Lall, Parshotam S.
Boots, shoes, and leggings
364579, 364580, 371 251, 371 271, 324 73PC, G06F 1100
Patent
active
048887153
ABSTRACT:
A semiconductor test system comprises an expected value storage area for storing expected values of output data supplied from a semiconductor device under test, a memory device for storing output data directly supplied from the semiconductor device under test in the form of the identical code with that of the expected value storage area, and a comparator for comparing output data from the memory device directly with expected values from the expected value storage area without any conversion.
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Seth, Data Compression Techniques in Logic Testing, U.S.Q, pp. 99-114, 2/77.
GenRad Semiconductor Test Inc., Milpitas, CA: Model GR18 General Purpose Complex VLSI Test System Standard Product Description and Specifications, Sep. 1983.
Fairchild Camera and Instrument Corporation, "VLSI Component Test System Product Description", Pub. No. 57140001, ECO No. 13269, May 1984.
Matsui Hideo
Tada Tetsuo
Lall Parshotam S.
Mitsubishi Denki & Kabushiki Kaisha
Ramirez Ellis B.
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