Recirculating loop memory array tester

Details Recirculating loop memory array tester Recirculating loop memory array tester

1980-06-26

1982-12-07

Atkinson, Charles E.

Excavating

371 25, 371 68, G01R 3128

Patent

active

043631240

ABSTRACT:
Apparatus is disclosed for quickly testing memory arrays of multiple recirculating loop memory elements. All loops are loaded simultaneously with identical test bits in the same time required to load a single loop. The loaded data is verified by means of a comparison gate which ANDs the outputs of all elements and produces a data verification output signal only in the event that all of the data from each element is identical with that from all other elements on a serial bit-by-bit basis.

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patent: 4038648 (1977-07-01), Chesley
Amelio, Physics and Applications of Charge-Coupled Devices, IEEE Intercon., Mar. 26-30, 1973, pp. 1-6.
R. C. Varshney, CCD Memory with Testing Capability, IBM Tech. Discl. Bulletin, vol. 22, No. 10, Mar. 1980, pp. 4564-4565.

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