Method of and apparatus for monitoring digital transmission syst

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235 92EC, 371 22, G01R 3128

Patent

active

043631231

ABSTRACT:
A periodically reset flip-flop is set when an error is detected in the bit stream of a digital transmission link being monitored. A counter is incremented in response to each period during which the flip-flop is set and is decremented in response to a plurality of periods during each of which the flip-flop is not set. An alarm signal is produced if the count reaches a certain value. In the presence of the alarm signal, the number of error-free periods which must occur to decrement the counter is increased. The arrangement is less sensitive to error bursts causing false alarms than bit-error-rate monitoring arrangements.

REFERENCES:
patent: 4053751 (1977-10-01), Ault
patent: 4080589 (1978-03-01), Kline
patent: 4234953 (1980-11-01), Kline
patent: 4241445 (1980-12-01), Payen
patent: 4291403 (1981-09-01), Waddill et al.

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