Semiconductor package

Electricity: conductors and insulators – Boxes and housings – Hermetic sealed envelope type

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Details

257667, 257670, 257676, 257787, H01L 2328

Patent

active

052527832

ABSTRACT:
A semiconductor package is provided having a die attach flag (12) with integral flanges (13) which prevent high pressure plastic encapsulant (18) from escaping or entering between the die attach flag (12) and a mold cavity plate (15) during encapsulation. The die attach flag (12) is held flush against the cavity plate (15) by the packing pressure of the encapsulant (18) during low pressure stages of the encapsulation process. Plastic flowing along the flange (13) solidifies more rapidly than plastic in the body of the semiconductor package, thereby damming plastic flow at the edges of the die attach flag (12) during high pressure stages of the encapsulation process.

REFERENCES:
patent: 4741507 (1988-05-01), Baird
patent: 4888307 (1989-12-01), Spairisano et al.
patent: 4933744 (1990-06-01), Segaua et al.

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