Open high speed bus for microcomputer system

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Details

395306, 395445, 395285, G06F 1300

Patent

active

055176267

ABSTRACT:
An open high-speed local system bus for a microcomputer system which is decoupled from I/O and provides a consistent interface to the CPU subsystem, memory subsystem, graphics subsystem and peripheral subsystem. The local system bus supports discrete and burst transactions, pipelining in both the transactions, multiple microprocessor and distributed interrupts.

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Digital Bus Handbook, Joseph DiGiacomo, ed., Chapters 5-7, McGraw-Hill Publishing Company, 1990.

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