Fishing – trapping – and vermin destroying
Patent
1988-12-23
1989-12-19
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
437 53, 437191, 357 24, H01L 21283, H01L 2978
Patent
active
048882984
ABSTRACT:
A process is described to eliminate the re-entrant profile in double polysilicon gate structures commonly used in VLSI microelectronic devices such as CCDs is eliminated by depositing a conformal insulating layer (5) on the poly-oxide layer (4), plasma etching to form spacer (6), oxidizing gate electrode (3) and substrate (10 to form oxide layer (7), and forming overlapping second gate electrode (8).
REFERENCES:
patent: 4332078 (1982-06-01), Peek et al.
patent: 4363696 (1982-12-01), Nagakubo et al.
patent: 4417947 (1983-11-01), Pan
Losee David
Rivaud Lydia L.
Roselle Paul
Chaudhuri Olik
Eastman Kodak Company
Owens Raymond L.
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