Method of profiling compensator concentration in semiconductors

Electricity: measuring and testing – Impedance – admittance or other quantities representative of... – Lumped type parameters

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324158, G01R 3126

Patent

active

051031833

ABSTRACT:
A method is provided for making cryogenic capacitance-voltage (C-V) measurements of semiconductor epitaxial layers without the need for measuring fully processed devices. The method utilizes impurity hopping conduction to obtain a compensator concentration profile. In a preferred embodiment, a metal electrode is evaporated onto the bottom of the substrate of a semiconductor wafer having a heavily doped substrate, a heavily doped epitaxial layer, and an undoped epitaxial layer. A mask is used to form metal electrode capacitor dots on the top of the undoped layer. The cryogenic C-V measurement system comprises a Helitran dewar with a wafer holder and electrical connections, a temperature controller, measurement electronics, and a microcomputer. A programmable dc source is stepped and combined with an ac voltage supplied by a lock-in amplifier. A preamplifier converts the current from a capacitor electrode on the wafer to a voltage measured by a lock-in amplifier. The wafer output is processed by phase sensitive detection in the lock-in amplifier. The C-V measurements are controlled by the microcomputer during automatic progression through the voltage steps. Compensator concentration versus depth is calculated from the component of the measured current that is in-phase with a reference capacitance. A plot of compensator concentration versus depth can be displayed on a monitor and undated after each voltage step.

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