Apparatus and method for performing spike analysis in a logic si

Details Apparatus and method for performing spike analysis in a logic si Apparatus and method for performing spike analysis in a logic si

1989-06-23

1992-02-25

Lall, Parshotam S.

Boots, shoes, and leggings

371 23, G06F 1520

Patent

active

050918729

ABSTRACT:
A logic circuit simulator for detecting a spike condition at the output of a simulated gate. A plurality of autonomous devices are arranged for parallel pipeline operation. Each device is designed to perform only a part of the overall simulation function. One of the devices is responsive to signals representing gate input stimuli and to gate propagation delay data primarily for performing the spike analysis function. Another device performs the function of gate output signal scheduling in response to gate input stimuli for transmitting messages containing said signals to the spike analyzing device and other devices of the simulator. When the spike analyzing device detects a spike condition, it transmits into the pipeline signals indicating the scheduling of an unknown output event on the gate in question.

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patent: 4787062 (1988-11-01), Nei et al.
patent: 4827427 (1989-05-01), Hyduke
patent: 4942615 (1990-07-01), Hirose

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