Process for making a memory device

Metal working – Method of mechanical manufacture – Assembling or joining

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Details

29577C, 148189, 148188, H01L 2122

Patent

active

043619495

ABSTRACT:
A first semiconductor circuit element including a first electrode is formed on a semiconductor substrate, an insulating layer for insulating the first electrode is formed on the first electrode, and a first opening is provided in a part of this insulating layer.
Subsequently, a second semiconductor circuit element is formed by forming a second electrode overlaying in part the insulating layer at an area other than the first opening and, a subsidiary conductive layer is formed in the first opening. Another insulating layer is formed on the structure thus formed, whereupon second and third openings are respectively provided in this latter insulating layer.
First and second conductors are respectively deposited in the second and third openings, whereby electrical contact to the first and second electrodes are provided, with contact to the first electrode being via the subsidiary conductive layer.

REFERENCES:
patent: 3570114 (1971-03-01), Bean et al.
patent: 3838442 (1974-09-01), Humphreys
patent: 4112575 (1978-09-01), Fu et al.
patent: 4160987 (1979-07-01), Dennard et al.
patent: 4183040 (1980-01-01), Rideout
patent: 4270262 (1981-06-01), Hori et al.

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