Three-dimensional integrated circuit and manufacturing method th

Details Three-dimensional integrated circuit and manufacturing method th Three-dimensional integrated circuit and manufacturing method th

1989-03-17

1990-07-03

Hille, Rolf

357 49, 357 68, H01L 2312, H01L 2352, H01L 2710

Patent

active

049395688

ABSTRACT:
The present invention is directed to a three-dimensional stacked IC and a method for forming a three-dimensional stacked IC on a base plate. The three-dimensional stacked IC includes a unit semiconductor IC, which has constituent ICs formed on either one surface or on both surfaces of a substrate. In addition, the unit semiconductor ICs have a plurality of conducting posts buried in and penetrating through the substrate and insulated therefrom. The unit semiconductor ICs have interconnection terminals provided on both sides of the substrate for connecting other unit semiconductor ICs or a base plate. By stacking plural unit ICs on the base plate, a very large scale IC can be fabricated. Each constituent IC is formed on a bulk silicon substrate, therefore excellent quality can be obtained. This can be also applied to the fabrication of a ROM structure such as a PROM or MASK ROM, using single unit semiconductor ICs, wherein a wiring for the ROM can be formed on the second surface of the substrate.

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