Method and apparatus for using a content addressable memory for

Details Method and apparatus for using a content addressable memory for Method and apparatus for using a content addressable memory for

1995-12-29

1998-07-14

Banankhan, Majid A.

395672, G06F 104

Patent

active

057817693

ABSTRACT:
A method and associated apparatus for using a content addressable memory (CAM) to process timed events in a process control application. A time value field in each CAM entry identifies the time at which a corresponding event is to be processed. An event identifier field in each CAM entry identifies the event to be processed. A time value generator applies signals indicative of a time value to the CAM. The CAM returns as data on its output signal paths any entries whose time value fields correspond to the applied time value signals. The event identifier field applied to the output signal paths of the CAM is then applied to the process controller to identify an event to be processed. The methods and apparatus of the present invention are applicable, for example, in communication controller devices wherein a protocol requires timed event processing for standardized communications (e.g., Fibre Channel or FDDI). In addition, the apparatus and methods may be applied to computer controlled processes to relieve the CPU of the overhead processing burden of processing interrupts corresponding to "timer ticks" unrelated to any event. In addition, application of the present invention to computer process control applications (including operating system processing of timed events) relieves the CPU of the processing overhead associated with creating, searching, and maintaining list or queue data structures for the scheduled events.

REFERENCES:
patent: Re34843 (1995-01-01), Ferguson
patent: 4040034 (1977-08-01), Belady et al.
patent: 4279015 (1981-07-01), Edelman et al.
patent: 4369494 (1983-01-01), Bienvenu et al.
patent: 4432051 (1984-02-01), Bagaert et al.
patent: 5063523 (1991-11-01), Vrenjak
patent: 5197115 (1993-03-01), Sueda et al.
patent: 5347645 (1994-09-01), Perry
patent: 5491815 (1996-02-01), Basso et al.
patent: 5691917 (1997-11-01), Harrison
"Priority-Based Parallel Architecture for Sensor Fusion", Kenji Nishida et al, Multisensor Fusion & Integration . . . Intelligent, Systems, 1994 Int'l Conf.
"Visual Basic 2.0," Simon, Barry, Windows Sources, Jul. 1993 V1 n6.
"Open VMS Kernds; Writing Correct Multithreaded Code", Hanrahan, Jamie Digital Systems Journal, Jul.-Aug. 1993, v15 n4.
"Event Identification in Hybrid Control Systems", M. D. Lemmon, Decision & Control, 1993 32nd Annual Conference.
"Accounting for Interrupt Handling Cost in Dynamic Priority", Real Time Systems, 1993 Symposium, Jetlay et al.
"A Decomposition Approach to Non-Preemptive Scheduling in Hard-Real-Time Systems", George Yuan, Department of Computer Science College Park, (1989).
"Timing Analysis for Fixed-Priority Scheduling of Hard-Real-Time Systems", Michael Gonzalez et al, IEEE Transactions on Software Engineering, 1994.
"Real-Time Software Testing for Microprocessor Based Protective Relays", N.I. Santoso, IEEE Transactions on Power Delivery, Jul. 1994.
Motorola Semiconductor Technical Data, MC10H155.

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