Fishing – trapping – and vermin destroying
Patent
1994-06-06
1995-10-24
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
437 52, 437919, H01L 2170, H01L 2700
Patent
active
054609992
ABSTRACT:
A method for fabricating a capacitor having a fin-shaped electrode on a dynamic random access memory (DRAM) cell having increased capacitance was achieved. The capacitor is fabricated on a silicon substrate having an active device region. The device region contains a metal-oxide-semiconductor field effect transistor (MOSFET), having one capacitor aligned over and contacting the source/drain of the MOSFET in the device region. The capacitor is increased in capacitance by forming a multi-layer insulator structure over the storage capacitor area and recessing alternate layers, then using the form as a mold for forming a fin-like bottom capacitor electrode. A high dielectric constant insulator is deposited on the bottom electrode as the inter-electrode dielectric. The top capacitor electrode is formed by depositing a doped polysilicon layer which also fills the recesses having the bottom electrode forming therein fin-shaped top capacitor electrode and completing a dynamic random access memory (DRAM) cell. This method also eliminates the need to plasma etch to the source/drain contact during the fabrication of the capacitor, thereby improving reliability and making a more manufacturable process.
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"3-Dimensional Stacked Capacitor Cell for 16M and 64M DRAMS" by T. Ema et al. International Electron Devices Meeting, 1988, pp. 593-595.
Hong Gary
Hsue Chen-Chiu
Chaudhuri Olik
Saile George O.
Tsai H. Jey
United Microelectronics Corporation
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