Digital filtering system for filtering digital outputs of a four

Details Digital filtering system for filtering digital outputs of a four Digital filtering system for filtering digital outputs of a four

1997-03-18

1998-07-14

Mis, David

Demodulators

Frequency shift keying or minimum shift keying demodulator

329302, 329303, 375328, 375335, 375350, H03D 300, H04L 2714

Patent

active

057810648

ABSTRACT:
A digital filtering system for filtering a first and a second digital signals inputted from a FSK (frequency-shift-keying) demodulator to generate a first and a second filtered digital signals. The FSK demodulator is used for demodulating a four level FSK signal into the first and second digital signals. The system comprises a first shift register for recording the first digital signal as a series of digital samples, a first bit decision circuit for determining a first voltage level according to the digital samples stored in the first shift register and generating a pulse signal at a leading edge of the first digital signal, a bit clock recovery circuit for generating a bit clock signal synchronized by the pulse signal, a first D flip-flop for storing the first voltage level determined by the first bit decision circuit when the bit clock signal occurs and generating the first filtered digital signal, a second shift register for recording the second digital signal as a series of digital samples, a second bit decision circuit for determining a second voltage level according to a plurality of predetermined digital samples stored in the second shift register, and a second D flip-flop for storing the second voltage level determined by the second bit decision circuit when the bit clock signal occurs and generating the second filtered digital signal.

REFERENCES:
patent: 3623075 (1971-11-01), Bench et al.
patent: 5053717 (1991-10-01), Schulz et al.
patent: 5694435 (1997-12-01), Kolle et al.

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