Synchronous carry frequency divider and method of using therefor

Details Synchronous carry frequency divider and method of using therefor Synchronous carry frequency divider and method of using therefor

1983-02-28

1985-11-12

Malzahn, David H.

Boots, shoes, and leggings

377 52, 377107, G06F 768, H03K 2116, H03K 2132

Patent

active

045532184

ABSTRACT:
A synchronous carry frequency divider having a series of counters wherein each pair of counters is separated by a flip-flop and wherein the last counter in the series is followed by a terminal flip-flop. The counters and the flip-flops are synchronously clocked so that the divisor ratio is increased by the number of flip-flops employed. When the terminal flip-flop is toggled by the last counter a terminal count signal and a preset enable signal are simultaneously achieved without the delays associated with terminal count decode networks.

REFERENCES:
patent: 3538442 (1970-11-01), Arkell et al.
patent: 3564220 (1971-02-01), Peddie et al.
patent: 3649815 (1972-03-01), Clifford
patent: 3849635 (1974-11-01), Freedman
patent: 3962565 (1976-06-01), Guyen-Phuoc
patent: 4002926 (1977-01-01), Moyer
patent: 4160898 (1979-07-01), Gaon
patent: 4231099 (1980-10-01), Stauers
patent: 4390960 (1983-06-01), Yamashita et al.
patent: 4413350 (1983-11-01), Bond et al.
Lenk, Logic Designer's Manual, Reston Publishing Company, 1977, chapter 4, pp. 222-226.

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