Decoupling apparatus for verification of a processor independent

Details Decoupling apparatus for verification of a processor independent Decoupling apparatus for verification of a processor independent

1983-03-28

1985-11-12

Thomas, James D.

Boots, shoes, and leggings

371 16, 371 17, G06F 1122, G06F 922

Patent

active

045532010

ABSTRACT:
In a data processing system having a plurality of CPUs, each CPU is operatively connected to other portions of the data processing system through a system interface unit. The CPU includes a cache memory, an execution unit, and a control unit. Further, each CPU includes an apparatus for verifying the operability of the CPU independent from the operation of the data processing system, which comprises a switch element, interposed between a first port of the CPU and the system interface unit, for decoupling the CPU from said system interface unit in response to a decoupling control signal. A detecting element, detects whether the CPU and the system interface unit are operatively connected to generate a configuration signal indicating the status of the operative connection. A maintenance panel is connected to the switch element and to the detecting element via a second CPU port. The maintenance panel includes logic to control the decoupling of the CPU from the system interface unit, control logic to cause the CPU to execute test sequences, and analyzing logic to check the results of the test sequences to verify whether the CPU is functioning correctly.

REFERENCES:
patent: 4048481 (1977-09-01), Bailey
patent: 4167779 (1979-09-01), Sullivan et al.
patent: 4371952 (1983-02-01), Schuck
patent: 4482953 (1984-11-01), Burke

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