Reference voltage generator using flash memory cells

Static information storage and retrieval – Floating gate – Particular biasing

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Details

3651853, 36518509, G11C 1606

Patent

active

057217025

ABSTRACT:
First and second flash memory cells or transistors, operating in the linear region of operation, are provided with different threshold values by providing different charges on their respective floating gates. The first of the pair of flash memory transistors is "over-erased" until it has a negative threshold voltage so that the first flash memory transistor is rendered permanently conducting when its control gate and source are at V.sub.ss. Circuitry is provided for connecting the first and second flash memory transistors in parallel circuits in which equal current values are generated in an equilibrium condition. Circuitry for sensing a voltage in each of the parallel circuits is provided to determine any imbalance in current values and provide an output voltage which may be used as an reference value when the currents are in equilibrium. Circuitry is provided for sensing variations in the output voltage to vary the current through one of the flash memory transistors to bring the currents into equilibrium when the output voltage varies from the reference value provided at equilibrium. The control gate of the first (over-erased) flash memory transistor is connected to the system ground, V.sub.ss to further increase the stability of the reference voltage generator.

REFERENCES:
patent: 5335198 (1994-08-01), Van Buskirk et al.
patent: 5339272 (1994-08-01), Tedrow et al.
patent: 5477499 (1995-12-01), Van Buskirk et al.

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