Bias circuit for transistor of a storage cell

Details Bias circuit for transistor of a storage cell Bias circuit for transistor of a storage cell

1996-12-16

1999-05-04

Cunningham, Terry D.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Slope control of leading or trailing edge of rectangular or...

327374, 327376, 327389, 327391, 327437, 326 20, 326 91, H03K 19017, H03K 512, H03K 1704

Patent

active

059007567

ABSTRACT:
Disclosed is an integrated circuit comprising storage circuits, these circuits themselves comprising insulation transistors to which a determined positive bias voltage may be applied. This bias voltage is determined by means of a first bias circuit. The disclosed circuit comprises a second bias circuit whose time constant in response to a voltage step is smaller than the time constant of the first circuit in response to the same step, this second circuit making it possible to reduce the response time of the first bias circuit.

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IEEE Journal of Solid-State Circuits, vol. 20, No. 5, Oct. 1985, New York US, pp. 979-985, C. S. Bill "A Temperature-and Process-Tolerant 64K EEPROM".

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