State machines

Details State machines State machines

1997-08-18

1998-06-30

Shah, Alpesh M.

395670, G06F 900

Patent

active

057747385

ABSTRACT:
State machines having a hierarchical arrangement of machines as between a parent state machine 10 and sibling state machines 11, 12, and 14. The parent state machine 10 generates a plurality of outputs constituting its output state as based upon its input state defined by inputs N and its internal state. Part of the input state is defined by a set of inputs 15 which include asynchronous signals such as reset and interrupts. The parent state machine 10 defines or partially defines input states as applied to the respective sibling state machines 11, 12, and 14 by producing a series of output states in response to input states as applied thereto and independent upon an existing internal state. This system enables machine design time to be reliably shortened by virtue of easier validation of tasks assigned to the sibling machines.

REFERENCES:
patent: 4415969 (1983-11-01), Bayliss et al.
patent: 4424581 (1984-01-01), Kawai
patent: 4627030 (1986-12-01), Barber
patent: 4750591 (1988-06-01), Coste et al.
patent: 4772845 (1988-09-01), Scott
patent: 4807222 (1989-02-01), Amitay
patent: 4815105 (1989-03-01), Bottoms et al.
patent: 4829575 (1989-05-01), Lloyd
patent: 4873456 (1989-10-01), Olisar et al.
patent: 4876640 (1989-10-01), Shankar et al.
patent: 4879680 (1989-11-01), Luckett et al.
patent: 4933897 (1990-06-01), Shankar et al.
patent: 4965472 (1990-10-01), Anderson
patent: 5005183 (1991-04-01), Carey et al.
patent: 5067104 (1991-11-01), Krishnakumar et al.
patent: 5204555 (1993-04-01), Graham et al.
patent: 5283817 (1994-02-01), Hara et al.
"Digital Logic & Computer Design", Mano, 1979, pp. 202-251 (Chap 6), pp. 407-453 (Chap 10), pp. 459-495 (Chap. 11).
"Discrete Mathematics and Its Applications", Rosen, 1990 pp. 626-631 (Section 10.2), pp. 644-655.
"Intro to Switching Theory & Logic Design", Hall & Peterson, 1981 pp. 267-333.
Research Disclosure, No. 325, May 1991, abstract No. 32517 "Programmable Processor Bus to MMIO Bus Dirigible Bus Mapping Control" p. 293.

Affiliated with

Also associated with

Rating

State machines does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with State machines, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and State machines will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1871013