Variable word length very long instruction word instruction proc

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395386, 395379, 395388, 395567, G06F 700

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active

057747377

ABSTRACT:
In a variable word length VLIW-instruction processor, a VLIW-instruction word length register is provided. A VLIW-instruction contains an indication as to VLIW-instruction word length such as a VLIW-instruction word length rewrite instruction. Based on this instruction, the VLIW-instruction word length of the VLIW-instruction word length register is rewritten. For the case of normal instructions (object programs) without any indication of the VLIW-instruction word length, a VLIW-instruction word length that is stored in the VLIW-instruction word length register is initialized to a predetermined value by, for example, the loading of an initial program performed at the time of power-on. This initialized instruction word length is used as a fixed value and an object program for a conventional processor is executed. Accordingly, even when the number of instructions that are simultaneously executed is set low, "NOP (non-execution)" is lessened and the effective use of instruction memory becomes possible. In addition, it becomes also possible to run object programs for conventional processors.

REFERENCES:
patent: 5530817 (1996-06-01), Masubuchi
patent: 5600810 (1997-02-01), Ohkami
patent: 5634025 (1997-05-01), Breternitz, Jr.
patent: 5649135 (1997-07-01), Pechanek et al.
patent: 5664135 (1997-09-01), Schlansker et al.
De Gloria et al. (A Programmable Instruction Format Extension to VLIW Architectures), pp. 35-40, 1992.
Microprocessor Report, "Philips Hopes to Displace DSPs with VLIW", B. Case, pp. 12-15, Dec. 5, 1994.

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