Boots – shoes – and leggings
Patent
1990-01-16
1992-06-30
Lall, Parshotam S.
Boots, shoes, and leggings
364489, 364488, G06F 1560
Patent
active
051269503
ABSTRACT:
Synchronous array logic circuitry and a system for automatically laying out such circuitry for the fabrication of integrated circuits are described. The synchronous array logic circuitry includes as many cells as necessary to perform the desired functions with each cell including a transistor array for evaluating a Boolean function and supplying the result to a storage element through a multiplexer. The storage element latches the output signal and supplies it to other transistor arrays and/or other cells. The transistor array includes serially connected transistors for performing AND functions and parallel connected transistors for performing OR functions. The multiplexer operates under control of a test signal to configure the storage elements serially, thereby enabling complete testability of all cells.
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Bahra Avi S.
Cooke David
Gill Jaspal S.
Glennon Michael J.
Hesketh John A.
Lall Parshotam S.
National Semiconductor Corporation
Trans V. N.
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