Condition code accumulator apparatus for a data processing syste

Details Condition code accumulator apparatus for a data processing syste Condition code accumulator apparatus for a data processing syste

1979-01-03

1981-06-02

Chapnick, Melvin B.

Boots, shoes, and leggings

G06F 1130

Patent

active

042714842

ABSTRACT:
Signals representing the past and present states of a condition under test during an instruction execution cycle, as well as a signal indicating that an execute cycle has taken place, are utilized as address signals applied to a memory which feeds an output to control a bistable element. The bistable element is set to the state of the memory output signal and supplies the address signal indicative of the past state of the condition under test. The memory is coded to respond at its output with signals controlling the bistable element such that once a given state of the condition under test is detected and stored in the bistable element, the latter is inhibited from switching regardless of any further changes in the condition under test during the current instruction execution cycle.

REFERENCES:
patent: 3570006 (1971-03-01), Hoff et al.
patent: 3593297 (1971-07-01), Kadner
patent: 3696340 (1972-10-01), Matsushita et al.
patent: 3875565 (1975-04-01), Endou et al.
patent: 3980991 (1976-09-01), Mercurio

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