Patent
1991-03-27
1992-01-28
James, Andrew J.
357 17, 357 16, 357 38, H01L 2714, H01L 3100, H01L 3300
Patent
active
050847481
ABSTRACT:
A semiconductor optical memory includes a gate layer composed of a p- first semiconductor layer, a p- or n- second semiconductor layer, and an n- third semiconductor layer provided between a cathode layer and an anode layer. Where the second layer is of n- type, an impurity concentration of the n- second semiconductor layer is lower than an impurity concentration of the n- third semiconductor layer, and a bandgap eneray of the n- third semiconductor layer is lower than bandgap energies of the cathode and anode layers. Where the second layer is of p- type, an impurity concentration of the p- second semiconductor layer is lower than an impurity concentration of the p- first semiconductor layer, and a bandgap energy of the p- first semiconductor layer is lower than bandgap energies of the cathode and anode layers. As a result, a response speed becomes as fast as several 100 Mb/s.
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patent: 4819048 (1989-04-01), Mand et al.
Kasahara et al., `Double Heterostructure . . . Switch . . . `, Appl Phys Letts 52(9), 29 Feb. 88.
Taylor et al, "A New Double Heterostructure Optoelectronic Switching Device Using Molecular Beam Epitaxy", J. Appl. Phys. 59(2), 15 Jan. 1986, pp. 596-600.
Kasahara Kenichi
Ogura Ichiro
Sugimoto Mitsunori
Tashiro Yoshiharu
James Andrew J.
Meier Stephen D.
NEC Corporation
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