Image processing device with means for processing multiple forms

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395101, G06K 1500

Patent

active

057547491

ABSTRACT:
A reprographic device is disclosed in which the read timing of three data bit streams can be synchronized with each other by means of two FIFO memory units. The least significant bit of an 8-bit first image signal is replaced with a 1-bit area data, with both then stored in a first FIFO memory unit. A second image data, either 1-bit or 8-bit, is stored in a second FIFO memory unit. The data from the first FIFO memory unit and the second FIFO memory unit are then synchronously output therefrom by means of a read timing controller. After the data is output, the 1-bit area data is separated from the remaining seven bits of the first image data, and a null bit is added to these seven bits.

REFERENCES:
patent: 4668995 (1987-05-01), Chen et al.
patent: 4949188 (1990-08-01), Suto
patent: 5315691 (1994-05-01), Sumiya et al.

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