Fishing – trapping – and vermin destroying
Patent
1989-03-23
1992-01-28
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 89, 437225, 148DIG51, 148DIG131, 156643, 156646, H01L 2100, H01L 2102, H01L 2120, H01L 2176
Patent
active
050844199
ABSTRACT:
A method of manufacturing a semiconductor device in which a portion of a monocrystalline silicon layer protruded from a surface of an insulating member is polished up to the surface by a chemical-mechanical polishing is disclosed. A polycrystalline silicon layer and a leveling material are formed in sequence on the protruded portion of the monocrystalline silicon layer and on an exposed part of the surface of the insulating member, and a reactive ion etching and the chemical-mechanical polishing are carried out.
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"Scaled CMOS Technology Using SEG Isolation and Buried Well Process", Endo, et al, IEEE Transactions on Electron Devices, vol. ED-33, No. 11, pp. 1659-1666 (Nov. 1986).
Everhart B.
Hearn Brian E.
NEC Corporation
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