High performance asynchronous bus interface

Details High performance asynchronous bus interface High performance asynchronous bus interface

1991-06-28

1993-11-23

Chun, Debra A.

Boots, shoes, and leggings

364DIG1, 364239, 3642408, 3642705, 364271, 3642715, G06F 1336

Patent

active

052652165

ABSTRACT:
A bus interface coupling an asynchronous bus and a slave device, such as a memory. The bus interface comprises an asynchronous bus controller and a synchronous bus controller. The asynchronous bus controller is implemented as two PAL state machines. One state machine controls the connection and disconnection phases of the bus protocol, while the other controls the data transfer phase. The synchronous bus controller controls data transfer between the bus and the slave device. The state machines are closely interlinked to each other and the synchronous bus controller allowing for increased bus efficiency.

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