Method of manufacturing a semiconductor memory device

Details Method of manufacturing a semiconductor memory device Method of manufacturing a semiconductor memory device

1996-03-11

1998-05-19

Niebling, John

Fishing, trapping, and vermin destroying

437 60, 437919, 437192, H01L 2170

Patent

active

057535272

ABSTRACT:
A first interlayer insulating film having a second contact hole is formed on a main surface of a semiconductor substrate 1 in a peripheral circuitry. A second plug electrode of the same material as a first plug electrode in a memory cell array is formed in the second contact hole. A pad layer is formed over the second plug electrode and a top surface of the first interlayer insulating film. The pad layer and a capacitor lower electrode are made of the same material. The pad layer is covered with the second interlayer insulating film. A third contact hole is formed at a portion of the second interlayer insulating film located above the pad layer. A first aluminum interconnection layer is formed in the third contact hole. Thereby, a contact can be formed easily between the interconnection layer and the main surface of the semiconductor substrate in the peripheral circuitry of a DRAM, and a manufacturing process can be simplified.

REFERENCES:
patent: 5323343 (1994-06-01), Ogoh et al.
patent: 5612241 (1997-03-01), Arima

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