Boots – shoes – and leggings
Patent
1993-04-09
1995-06-20
Lee, Thomas C.
Boots, shoes, and leggings
395425, 3642434, 36424341, 36424344, 364DIG1, G06F 1324
Patent
active
054267498
DESCRIPTION:
BRIEF SUMMARY
TECHNICAL FIELD
The present invention relates to a buffer storage control system for controlling a buffer storage in a store-through method based on a part of a page address of a logical address and a part of a byte index of the logical address used as a line address.
BACKGROUND ART
A data processing apparatus includes a buffer storage using high speed and small capacity memory elements used in a central processing unit (CPU). On the other hand, a main storage includes a low speed and large capacity memory elements. Data blocks separated in the main storage are copied and stored on the buffer storage so that it is possible to achieve high speed access from the central processing unit to the main storage by accessing the data blocks copied into the buffer storage.
In general, a set associative method is utilized for a mapping operation from the main storage to the buffer storage. In this method, a plurality of WAYs are provided on a line which is accessed by a part of an address of the data block. The data and the block address except for bits used in the line address, are registered on the WAY. In the buffer storage, a space which registers the data is called a data portion (DATA), and a space which registers the block address is called a tag portion (TAG).
Further, there is a store-through method as a control method of the buffer storage. In this method, when there is no data to be objected for a fetch access, the block including the object data is moved from the main storage to the buffer storage (i.e., move-in operation MI). When performing the store access, the object data is stored in the main storage and the buffer storage. When there is no object data in the buffer storage, the object data is stored only in the main storage.
On the other hand, there are two kinds of addresses for accessing the buffer storage, i.e., one is a method of using only a part of a byte index of the logical address, and the other is a method of using both a part of a page address of the logical address and a part of the byte index of the logical address. The present invention relates to a buffer control storage system using the latter.
In this case, the logical address is used as an address for accessing from a central control unit to a main storage unit, and there are two types of addresses in accordance with a state of the central control unit. One is a real address, and this address is converted to an absolute address to access the main memory by means of a prefix conversion means using a prefix-register. The other is a virtual address, and this address is converted to the absolute address by means of an address conversion means using an address conversion table.
In both address types, the address is divided into the page address for an upper portion of the address and the byte index for a lower portion of the address. Further, before and after the prefix conversion or address conversion, values in the byte index are not changed, and values in the page address are changed. For example, when address bits are given by 01 to 31 and a page size is given by 4 Kbytes, 19 bits (01 to 19) denote the page address portion, and 12 bits (20 to 31) denote the byte index portion.
Further, the central processing unit simultaneously accesses the address conversion buffer and the TAG portion of the buffer storage to achieve high speed pipe-line processing. In this case, since the TAG portion cannot be accessed by using the absolute address which is obtained as a result of the retrieval for the address conversion buffer. Accordingly, in general, a part of the byte address of the logical address is used as the line address for the buffer storage.
When the page size is given by 4 Kbytes and the block size is given by 64 bytes, the logical address which can be used as the line address for the buffer storage is given by bits 20 to 25 so that it becomes 64 bytes.times.64 bytes=4 Kbytes per one way (WAY). In this method, the number of the WAY is increased to increase capacity of the buffer storage. However, when increasing the number of the
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Fujitsu Limited
Lee Thomas C.
Meky Moustafa M.
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