Boots – shoes – and leggings
Patent
1997-07-17
1998-12-08
Malzahn, David H.
Boots, shoes, and leggings
36478704, G06F 750
Patent
active
058479848
ABSTRACT:
Carry lookahead adders reduce the number of logic levels required to sum two numbers. A pure carry lookahead adder, however, requires circuits with large fan-outs and fan-ins making it impractical to build for a large number of bits. Carry lookahead tree adders use a plurality of small carry lookahead adders to build a complete adder. A binary carry lookahead adder is a typical implementation of a carry lookahead tree adder. Each stage of the binary carry lookahead adder generates a propagate output and generate output from propagate and generate inputs and calculates a carry output from a carry input. A modified generate circuit is introduced which reduces the propagation delay of the generate circuit. A modified propagate circuit is introduced that ensures the inputs to the modified propagate circuit do not create a short circuit. Additionally, a combination propagate and generate circuit is introduced which reduces the number of transistors required to implement the propagate and generate circuits. Still further, a quadrature carry lookahead tree adder is discussed and a combination propagate and generate circuit for the quadrature tree adder is presented.
REFERENCES:
patent: 4858468 (1989-08-01), Hwang
patent: 5276635 (1994-01-01), Naini et al.
patent: 5508952 (1996-04-01), Kantabutra
Advanced Micro Devices , Inc.
Kivlin B. Noel
Malzahn David H.
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