Fishing – trapping – and vermin destroying
Patent
1992-06-23
1993-11-23
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 50, 437229, 437913, 148DIG150, H01L 21265
Patent
active
052643832
ABSTRACT:
Source (51) and drain (52) of a thin-film transistor (TFT) are formed from a conductive layer (5) using a photolithographic step (FIG. 3) in which the gate (4) serves as a photomask. In accordance with the invention the insulated gate structure (3,4) is formed at the upper face of the channel-forming semiconductor film (2), i.e. remote from the transparent substrate (1). The semiconductor film (2) may be annealed to high-mobility polycrystalline material before depositing the gate structure (3,4) and the overlying conductive layer (5). In this way, high speed TFTs can be formed due to a combination of low gate-to-drain and gate-to-source capacitances and the provision of the transistor channel in the high quality semiconductor material adjacent to the upper face of the film (2). Preferably ultra-violet radiation (20: FIG. 1) is used for the annealing with an absorption depth less than the thickness of the film (2) so that the film-substrate interface is not heated which otherwise may weaken the adhesion of the film (2) to the substrate (1). By using an angled exposure in a photolithographic and etching step with the gate (4) as a shadow photomask, a low-doped drain part can be defined from a conductive layer (5) comprising highly-doped material on low-doped material. This low-doped drain part reduces the effect of high drain bias in operation of the TFT.
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Biren Steven R.
Hearn Brian E.
Trinh Michael
U.S. Philips Corp.
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