Method to avoid program disturb and allow shrinking the cell siz

Details Method to avoid program disturb and allow shrinking the cell siz Method to avoid program disturb and allow shrinking the cell siz

1999-05-19

2000-05-23

Mai, Son

Static information storage and retrieval

Floating gate

Particular biasing

36518514, 36518515, G11C 1604

Patent

active

060672544

ABSTRACT:
A method of programming split gate flash memory cells which avoids erroneously programming non selected cells and allows the cell size and the array size to be shrunk below previously realizable limits. For N channel cells with the control gates connected to word lines and drains connected to bit lines a negative voltage is supplied between the non selected word lines and ground potential. For P channel cells with the control gates connected to word lines and drains connected to bit lines a positive voltage is supplied between the non selected word lines and ground potential. This allows the minimum length of the control gate over the channel region to be reduced below previously allowable limits and still prevent programming of non selected cells. This also allows cell size and array size to be reduced.

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patent: 5600592 (1997-02-01), Atsumi et al.
patent: 5614747 (1997-03-01), Ahn et al.
patent: 5667757 (1997-09-01), Jeng
patent: 5966332 (1999-10-01), Takano

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