Video signal decoder

Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry

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Details

358136, 358138, H04N 712, H04N 700, H04N 713

Patent

active

051287595

ABSTRACT:
A MUSE-format video signal decoder comprising a first frame memory supplied with an input digital video signal and having a delay time of 1-frame period; a 1-frame difference detector including a first interpolation filter supplied with the input digital video signal, a second interpolation filter supplied with the digital video signal from the first frame memory, a first subtracter for obtaining the difference between the outputs of the first filter and the first frame memory, and a second subtracter for obtaining the difference between the input digital video signal and the output of the second filter, wherein a 1-frame difference signal is produced in accordance with the outputs of the first and second subtracters; and a 2-frame difference detector including first and second bit compressors supplied with the outputs of the first and second subtracters respectively, a second frame memory having a delay time of 1-frame period and supplied with outputs of the first and second bit compressors, and an adder for obtaining the sum of the other outputs of the first and second bit compressors and the output of the second frame memory, wherein a 2-frame difference signal is produced in accordance with the output of the adder. Due to such constitution, the capacity of each frame memory can be reduced.

REFERENCES:
patent: 4785351 (1988-11-01), Ishikawa
patent: 4868654 (1989-09-01), Juri et al.
patent: 4979037 (1990-12-01), Mizutani et al.
patent: 4979040 (1990-12-01), Masumoto
patent: 5018010 (1991-05-01), Masumoto

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