Structure and method of making a capacitor for an intergrated ci

Electricity: electrical systems and devices – Electrostatic capacitors – Fixed capacitor

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3613061, 437919, H01G 4005, H01G 4228

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active

054521785

ABSTRACT:
A capacitor structure for a memory element of an integrated circuit is provided. The capacitor is formed within a via hole defined through a first dielectric layer, and comprises a bottom electrode defined by an underlying conductive layer, and a capacitor dielectric filling the via with a dielectric barrier layer lining the via and separating the capacitor dielectric from the first dielectric layer. The capacitor dielectric is characterized by a material with high dielectric strength, preferably a ferroelectric material. An overlying conductive layer defines a top electrode contacting the capacitor dielectric. The barrier layer may comprise dielectric sidewall spacer formed within the via, or alternatively may comprise a region of mixed composition formed by interdiffusion of the first dielectric layer and the capacitor dielectric. The resulting capacitor structure is simple and compact, and may be fabricated with known CMOS, Bipolar or Bipolar-CMOS processes for submicron VLSI and ULSI integrated circuit.

REFERENCES:
patent: 5218512 (1993-06-01), Nakamura
patent: 5227855 (1993-07-01), Momose
patent: 5335138 (1994-08-01), Sandhu et al.

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