Process for deposition of inorganic materials

Coating processes – Electrical product produced – Integrated circuit – printed circuit – or circuit board

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4272481, C23C 1600

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active

051281732

ABSTRACT:
The subject invention comprises forming a plurality of positively charged ions of an ionizable coating material in an ion formation area. A deposition area is provided at a predetermined distance from the ion formation area. This deposition area is capable of being negatively charged for attracting the positively charged ions of the ionizable coating material. Next, the deposition area is negatively charged so that a uniform, substantially parallel flow path is formed for the ionizable coating material between the ion formation area and the negatively charged deposition area. A substrate is then positioned between the ion formation and deposition areas within the uniform, substantially parallel flow path, and preferably perpendicular to the flow path. The positively charged ions of the coating material are released from the ion formation area into the flow path, and are moved within the flow path by the attraction of the positively charged ions toward the negatively charged deposition area. This results in a uniform deposition of a thin layer of the coating material onto the surface of the substrate which faces the ion formation area within the ionized coating material flow path. The process of this invention can be controlled so that the formation of the positively charged ions is confined within the ion formation area and, when the formation of the positively charged ions is completed, the release of the positively charged ions is controlled so that it is conducted when the substrate is positioned.

REFERENCES:
patent: 4634600 (1987-01-01), Shimizu
"In-Situ Rapid Isothermal Processing (RIP) of Thin CaF2 Films on Silicon (100)" 1987 Authors: S. Anand Kugan, R. Radpout and R. Singh.
R. F. C. Farrow, et al, in the J. Vac. Sci. Technol., vol. 19 No. 3 Sep./Oct. 1981.
"MeV Ion Channeling Study of CaF2/Si (111) Epitaxy" in J. Vac Sci. Technol., A. vol. 4, No. 3, May/Jun. 1986.
"Epitaxial Dielectrics for Ultra-Large Sale Integration (ULSI) and Three-Dimensional IC's" by F. Radpour, S. Ananda Kugan, R. Singh, M. Rahmati, W. L. Krisa, S. K. Kahng, S. P. Joshi, J. Narayan, P. K. Chatterjee. (pp. 1-11) 1987.

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