Fishing – trapping – and vermin destroying
Patent
1994-12-14
1995-09-19
Thomas, Tom
Fishing, trapping, and vermin destroying
437 46, 437 48, 437 56, 437 89, 437915, H01L 218244
Patent
active
054515343
ABSTRACT:
A memory cell layout and method of forming a 6 transistor SRAM memory cell that achieves a reduced cell area using uncomplicated fabrication steps. In one embodiment, a six transistor (6/T) SRAM cell has two horizontal thin-film transistor (T5, T6) as load transistors, two transfer transistors (T1, T2), two latch transistors (T3, T4) and two current nodes (38, 40). In this structure all six transistors are formed in the substrate and a single polysilicon layer.
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patent: 4876215 (1989-10-01), Hsu
patent: 4987092 (1991-01-01), Kobayashi
patent: 5198683 (1993-03-01), Sivan
patent: 5266507 (1993-11-01), Wu
patent: 5298782 (1994-03-01), Sundaresan
patent: 5354704 (1994-11-01), Yang et al.
Saile George O.
Stoffel William
Thomas Tom
United Microelectronics Corporation
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