Flip-flop circuit

Details Flip-flop circuit Flip-flop circuit

1976-03-12

1977-09-27

Zazworsky, John

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307247R, 307279, 307299B, 307303, 357 35, 357 44, 357 46, H03K 329

Patent

active

040513890

ABSTRACT:
A flip-flop circuit comprises a pair of inversely operated first and second npn vertical transistors. The first npn transistor has dual collectors. Also provided are a pair of first and second pnp lateral transistors operated as loads and a pair of third and fourth pnp lateral transistors for triggering, each base of the first and second npn vertical transistors being connected to a collector of the second npn transistor and to one of the dual collectors of the first npn transistor, respectively. Each collector of the first and second pnp transistors is connected to said one of the dual collectors of the first npn transistor and to the collector of the second npn transistor, respectively. Each emitter of the first and second pnp transistors is connected to an electric source, each base of the first and second npn transistors is connected to each emitter of the third and fourth pnp transistors, respectively, and each base of the third and fourth pnp transistors is connected to said one of the dual collectors of the first npn transistor through a first resistor and to the collector of the second npn transistor through a second resistor. Each collector of the third and fourth pnp transistors is connected to an input terminal for trigger signals, an output terminal is connected to the other collector of the dual collectors of the first npn transistor, and each emitter of the first and second npn transistors and each base of said first and second pnp transistors is grounded.

REFERENCES:
patent: 3309534 (1967-03-01), Yu et al.
patent: 3459974 (1969-08-01), May
patent: 3474261 (1969-10-01), Ryerson et al.
patent: 3617778 (1971-11-01), Korom
patent: 3783400 (1974-01-01), Gay
1973 IEEE Intercon Technical Papers, vol. 6, Solid State, IEEE Convention Mar. 26-30, 1973, p. 30 4:1,2, "High Density Bipolar Memories and Logic," Wiedmann, S. K.

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