Boots – shoes – and leggings
Patent
1991-09-13
1994-11-01
Coleman, Eric
Boots, shoes, and leggings
364271, 3642814, 3642817, 364DIG1, 395650, 395375, G06F 900
Patent
active
053613694
ABSTRACT:
When a plurality of processors share a plurality of tasks and parallelly process the shared tasks, each of these processors outputs bit information for designating a processor in a group to which the processor belongs, when a currently executed task processing has been terminated, and the bit information is stored in a synchronous register disposed in each of the processors. When it is detected that all of processors in the same group have terminated task processings, each of these processors in the same group are supplied with a synchronization termination signal from the synchronous registers related thereto. Before all of the task processings have been terminated in the same group, any processors in the same group which have already terminated their task processings progress the execution of the next tasks until they access for the first time a data sharing circuit for holding data shared among the processors.
REFERENCES:
patent: 4344134 (1982-08-01), Barnes
patent: 4493053 (1985-01-01), Thompson
patent: 4925311 (1990-05-01), Neches
patent: 5197137 (1993-03-01), Kumar
IBM Tech Discl. Bul. vol. 31. No. 11. Apr. 1989 pp. 382-389. "Low-Cost Device for Contention Free Barrier Synchronization".
Coleman Eric
Hitachi , Ltd.
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