Excavating
Patent
1995-02-24
1997-12-23
Baker, Stephen M.
Excavating
39518204, G06F 1110
Patent
active
057013136
ABSTRACT:
A method and apparatus for removing soft errors in a memory element by providing dedicated hardware associated with each memory element which monitors for soft errors as data is read from the memory element. Further, when a soft error is detected, the dedicated hardware may correct the soft error and may further initiate a write operation and over-write the corrupted data word with a corrected data word. This may be accomplished without any intervention by the system.
REFERENCES:
patent: 3761695 (1973-09-01), Eichelberger
patent: 4056844 (1977-11-01), Izumi
patent: 4058851 (1977-11-01), Scheuneman
patent: 4092713 (1978-05-01), Scheuneman
patent: 4112502 (1978-09-01), Scheuneman
patent: 4130865 (1978-12-01), Heart et al.
patent: 4139148 (1979-02-01), Scheuneman et al.
patent: 4163147 (1979-07-01), Scheuneman et al.
patent: 4195770 (1980-04-01), Benton et al.
patent: 4225958 (1980-09-01), Funatsu
patent: 4298980 (1981-11-01), Hajdu et al.
patent: 4308616 (1981-12-01), Timoc
patent: 4349871 (1982-09-01), Lary
patent: 4369511 (1983-01-01), Kimura et al.
patent: 4370746 (1983-01-01), Jones et al.
patent: 4426681 (1984-01-01), Bacot et al.
patent: 4433413 (1984-02-01), Fasang
patent: 4442487 (1984-04-01), Fletcher et al.
patent: 4476431 (1984-10-01), Blum
patent: 4493077 (1985-01-01), Agrawal et al.
patent: 4513283 (1985-04-01), Leininger
patent: 4525777 (1985-06-01), Webster et al.
patent: 4531213 (1985-07-01), Scheuneman
patent: 4534028 (1985-08-01), Trischler
patent: 4535467 (1985-08-01), Davis et al.
patent: 4546272 (1985-10-01), Suzuki et al.
patent: 4566104 (1986-01-01), Bradshaw et al.
patent: 4580066 (1986-04-01), Berndt
patent: 4595911 (1986-06-01), Kregness et al.
patent: 4608683 (1986-08-01), Shigaki
patent: 4628217 (1986-12-01), Berndt
patent: 4649475 (1987-03-01), Scheuneman
patent: 4667288 (1987-05-01), Keeley et al.
patent: 4670876 (1987-06-01), Kirk
patent: 4701920 (1987-10-01), Resnick et al.
patent: 4755930 (1988-07-01), Wilson, Jr. et al.
patent: 4757440 (1988-07-01), Scheuneman
patent: 4782487 (1988-11-01), Smelser
patent: 4783785 (1988-11-01), Hanta
patent: 4788684 (1988-11-01), Kawaguchi et al.
patent: 4794521 (1988-12-01), Ziegler et al.
patent: 4807110 (1989-02-01), Pomerene et al.
patent: 4835774 (1989-05-01), Ooshima et al.
patent: 4843542 (1989-06-01), Dashiell et al.
patent: 4847519 (1989-07-01), Wahl et al.
patent: 4860192 (1989-08-01), Sachs et al.
patent: 4876685 (1989-10-01), Rich
patent: 4888772 (1989-12-01), Tanigawa
patent: 4903266 (1990-02-01), Hack
patent: 4918695 (1990-04-01), Scheuneman et al.
patent: 4918696 (1990-04-01), Purdham et al.
patent: 4926426 (1990-05-01), Scheuneman et al.
patent: 4962501 (1990-10-01), Byers et al.
patent: 4984153 (1991-01-01), Kregness et al.
patent: 4992930 (1991-02-01), Gilfeather et al.
patent: 4996688 (1991-02-01), Byers et al.
patent: 5023776 (1991-06-01), Gregor
patent: 5025365 (1991-06-01), Mathur et al.
patent: 5025366 (1991-06-01), Baror
patent: 5058006 (1991-10-01), Durdan et al.
patent: 5107501 (1992-04-01), Zorian
patent: 5138619 (1992-08-01), Fasang et al.
patent: 5148533 (1992-09-01), Joyce et al.
patent: 5155735 (1992-10-01), Nash et al.
patent: 5193163 (1993-03-01), Sanders et al.
patent: 5195185 (1993-03-01), Marenin
patent: 5202966 (1993-04-01), Woodson
patent: 5228132 (1993-07-01), Neal et al.
patent: 5255375 (1993-10-01), Crook et al.
patent: 5313602 (1994-05-01), Nakamura
IBM Technical Disclosure Bulletin, vol. 18, No. 5, Oct. 1975, pp. 1415-1416.
IBM Technical Disclosure Bulletin, vol. 25, No. 10, Mar. 1983, pp. 5196-5198.
Electronics, "Level-Sensitive Scan Design Test Chips, Boards, Systems, Neil C. Berglund", vol. 52, No. 6, Mar. 15, 1979, pp. 108-110.
"Hierarchial Cache/Bus Architecture for Shared Memory Multiprocessors", Wilson, Jr., Conference Proceedings IEEE 14th Symposium on Computers, 1987.
"Effects of Cache Coherency in Multiprocessors", Dubois et al., IEEE Trans. on Computers, vol. C-31, No. 11, Nov. 1982.
Baker Stephen M.
Unisys Corporation
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